With the continuous development of the semiconductor technology, semiconductor devices have been developed toward higher device densities and higher integration levels. As the basic semiconductor devices, transistors have been widely used. When the device density and the integration level are increased, the critical dimension of the gates of planar transistors has become smaller and smaller. Such a critical dimension reduction has caused the control ability of the conventional transistors on their channel currents to be weaker. Thus, the short-channel effect and the leakage current often occur; and the performances of the semiconductor devices are adversely affected.
To overcome the short channel effect, and inhibit the leakage current, fin field-effect transistors (FinFETs) have been developed. FinFETs are a typical type of multi-gate devices. A FinFET includes at least one fin and a dielectric layer formed on the surface of a semiconductor substrate. The dielectric layer covers the side surfaces of the at least one fin; and the top surface of the dielectric layer is lower than the top surface of the at least one fin. The FinFET also includes a gate structure formed on the top and side surfaces and the dielectric layer; and a source formed in the fin at one side of the gate structure and a drain formed in the fin at the other side of the gate structure.
However, with the continuous shrinking of the critical dimension of the semiconductor devices, the distances between adjacent fins have become smaller and smaller. Thus, the heat dissipation ability among fins has become worse and worse. The heat accumulated in the fins may adversely affect the performance of the semiconductor devices. Thus, determining the relationship between the heat in the fins and the performance of the FinFETs becomes a key factor for evaluating the reliability of the FinFETs.
The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems in the art.